April/May 2021

18 PCIM 2021 Issue 2 2021 Power Electronics Europe www.power-mag.com kV and 6.5 kV modules, countermeasures to suppress SE-Osc and PETT-Osc together are indicated by an optimum relation of the internal inductances for each module. “Reduction of Parasitic Inductance and Thermal Management in a Multichip SiC Half-Bridge Module” will be presented by Tobias Ubostad, PhD, Norwegian University of Science and Technology. The advantages of SiC devices can only be benefited from if they are properly packaged. Existing packaging technology is based on Si packaging, which cannot be used to exploit the benefits of SiC semiconductors, as they are more sensitive to the stray inductance present in the module and that leads to problematic switching. In this paper modifications to the inner structure of an existing SiC multichip module are proposed and evaluated through simulations and comparison with a commercial module. “Faster Switching with Less Overvoltage - Limitations in Current, Parasitics and Paralleled Chips” will be evaluated by Pablo Rodriguez de Mora, Research associate, Universität Bayreuth/Germany. This work explores the turn-off switching behavior of a 3rd. Gen. SiC MOSFET at its limit; that is with zero external gate resistance. It is observed, that the waveforms do not follow the typical trajectories and the device shows a mechanism that limits its over-voltage and hand in hand greatly reduces the turn-off switching losses. A “Full Bridge SiC Module for Charger Applications” will be introduced by Max-Josef Kell, Research Engineer, Danfoss Silicon Power/Germany. The company developed a new multi-chip SiC module combining a full bridge topology in a compact frame-based package with baseplate. The module layout was designed to be conducive to a good symmetry between paralleled chips both in dynamic and static current sharing and to show a robust switching behavior, avoiding effects such as parasitic turn-on. The session Power Modules II on the Monday (May 3, 2:30 pm) will be opened by Mario Pulvirenti, Appl. Engineer, STMicroelectronics/Italy with the stream “Wire Bonding Stress Analysis Under Short-Circuit Tests for SiC MOSFETs”. The aim of this digest is to analyze the electrothermal stress of bonding wires, which are usually welded on the die of SiC MOSFETs, during short-circuit events. The short-circuit test (SCT) is a typical experiment conducted to evaluate SiC MOSFETs’ robustness, however, in case of non- destructive short-circuit tests, it is also important to understand how this type of stress can impact on the reliability and lifespan of bonding wires. “Smart Package Upgrade to Improve Power Density and Lifetime in Heavy- Duty Vehicles” is the subject of the stream by Stefan Buschhorn, System Engineer, Infineon Technologies/Germany. Electrified drive trains in heavy-duty vehicles pose a challenge to semiconductors in a multitude of ways. Extended lifetime requirements in a mechanically demanding environment put high pressure on power density, power cycling capability and reliability. The well-established EconoDUAL3 power modules are upgraded with a ribbon-bond structure to operate in direct liquid-cooling systems, thus improving the thermal situation. The reduction in thermal stress and the correlating benefits in terms of lifetime are presented in this work. A “Comprehensive Analysis of the Impact of Serial and Parallel Cooling on the Thermal Performance of Power Semiconductor Modules” will be presented by Lluis Santolaria, R&D Engineer, Hitachi ABB Power Grids/Switzerland. A comparison between serial and parallel cooling strategies for consecutive power semiconductor modules was demonstrated by means of Computational Fluid Dynamics (CFD). In the analysis, two different cooling structures were taken into consideration, namely pin fin distribution and meandering channels. The analysis showed that, generally, serial configurations with optimized designs can offer reasonably better thermal performance than equivalent parallel configurations due to the improved usage of the available flow rate. “Active Short Circuit Capability of Half-Bridge Power Modules Towards E- Mobility Applications” is examined by Antoni Ruiz, R & D Engineer, also from Hitachi ABB Power Grids. A methodology to characterize active short circuit (ASC) in half-bridge power modules is demonstrated and utilized to determine the capability of the RoadPak module towards this failure mode in e-mobility applications. First, a surge current test with increasing current, until failure occurrence, is performed on the modules and then replicated in a simulation environment to calculate which maximum junction temperature the chips inside the module can withstand. Then, an ASC event, using a developed PLECS model, is simulated to calculate the temperature of the chips during the event, thus obtaining a pass-fail criterion for the specified current. The Monday session Power Modules III (May 3, 4:10 pm) continues with “Benefits of Using the New 1700V and 3300V High Power Modules for Traction Applications” by Miroslav Hruska, Siemens/Tschechien. The stream presents the results of analysis of current requirements of traction converters powered by 750 V DC and 1500 V DC, comparison of performance of Fact figures of PCIM 2019 last in-person event