April/May 2021

PCIM 2021 19 www.power-mag.com Issue 2 2021 Power Electronics Europe modern 1700V and 3300 V Si IGBT, Hybrid Si IGBT / SiC SBD and Full - SiC MOSFET modules from Hitachi and evaluation of their benefits when used in traction converters. “Assembly Technologies for Highly Integrated Sandwich Type Power Modules with WBG Semiconductors” are introduced by Tine Konjedic, Martin Rittner, Robert Bosch/Germany. Automotive power electronics are evolving rapidly. Wide Band Gap semiconductors opened the door to fast switching at higher operating temperatures, but to tap the potential, modules need to be designed as highly integrated, highly reliable, intelligent systems. Modules with sandwich type architecture built as a stack of power substrate, WBG-dies and fine pitch multilayer substrate provide all ingredients for this. The assembly technologies of two such module designs are presented. The “Development of the Laser Beam Based High-Current Contacting Technology and an Integrated Lead Frame Stack Structure” is highlighted by Woo-Sik Chung, Research associate, Fraunhofer Institute ILT/Germany. A new development of laser beam based high-current contacting technology and an integrated lead frame stack structure for efficient heat dissipation is investigated. The purpose of this development is to increase the power and integration density of power semiconductor devices while simultaneously improving the switching properties in high-frequency switching processes. The “Application and Verification of Effective Heat Spreading Angles on a Multi-Layer Thermal Design” is introduced by Robin Weiß, Scientist with lectureship, Technical University of Dresden/Germany. Choosing a thermal design for discrete semiconductors often relies on an estimation of the average junction temperature. Looking for a time-efficient and accurate approach the concept of effective heat spreading angles is applied on a full thermal design of a natural cooled SMT semiconductor. Specifically derived angles are suggested for accurate modeling of the thermal resistances. The proposed model is validated by measurements showing high agreement. SiC Devices & Applications Following the SiC session on the Monday the Tuesday morning (May 4, 9:05 am) starts with “An Alternative Approach to Parasitic Turn On Detection” by Jorge Mari, Senior Principal, Danfoss Silicon Power/Germany. Parasitic Turn On in multi-chip modules has multiple causes. These go well beyond the Miller capacitance, which though important it not need be the sole reason for the phenomenon. In this presentation we cover multiple reasons for PTO and propose a practical method to identify when PTO occurs and how to avoid it. Numerous experimental studies in multiple modules validate the approach. “MOSFET Body Diodes in Fast Switching Applications” are investigated by Paul Sochor, Development Engineer, Infineon Technologies/Germany. The turn-off transient of SiC MOSFET body diodes differs from that of Si pn-diodes in IGBT circuits due to their unique characteristics. The output capacitance has a larger, and the bipolar charge a smaller impact. However, this changes at elevated temperatures and high current densities. Moreover, in fast switching applications, the commutation loop stray inductance plays a significant role. The conventional definition to determine Erec and Qrr may give misleading results that do not represent the actual device properties. This stream discusses the unique characteristics and various influences on the body diode turn-off behavior. “Influence of the Threshold-Voltage Hysteresis on the Switching Properties of SiC MOSFETs” by Andreas Hürner, Development Engineer, Infineon Technologies/Germany analyzes the influence of the gate-source threshold-voltage shift caused by the hysteresis effect on the switching performance of SiC MOSFETs. Based on these results, different approaches on how to consider this effect in behavioral compact models will be presented and discussed in detail. A “Comparison of Three Methods to Improve Short Circuit Capability of 1.2 kV SiC Power MOSFETs” will be given by Ajit Kanale, Graduate Research Assistant, North Carolina State University/USA. SiC Power MOSFETs have poor short-circuit (SC) ruggedness compared to Si IGBTs. Solutions to improve SC capability require a trade-off with on-resistance. The paper compares the trade-off for three solutions - gate bias reduction, using series ballast resistors and BaSIC(EMM). BaSIC(EMM) achieves a 1.86x increase in SC capability for commercial 1.2 kV SiC MOSFETs with only 4 % increase in on-resistance, while the other solutions had on-resistance increases in excess of 31 %. GaN Devices Three streams are available on the Tuesday (May 4, 10:20 – 11:05 am). The “Design of Low-Resistance and Area-Efficient GaN-HEMTs for Low- Voltage Power Applications” by Richard Reiner, Scientist, Fraunhofer Institute IAF/Germany presents different low-resistance and area-efficient layouts for low voltage GaN-HEMT devices. Intrinsic device structures and extrinsic chip layouts are investigated to achieve the lowest possible area-specific resistance under consideration of the given technology limits. Three fabricated device demonstrators feature low specific on-state resistances for a comb structure, a reduced resistance of for a matrix structure, and a further reduced resistance for a symmetrical matrix structure. “A Three-Phase GaN-on-Si Inverter IC for Low-Voltage Motor Drives” will be introduced by Stefan Moench, Scientist, Fraunhofer Institute IAF. A GaN-based monolithic three-phase inverter IC is presented. An intrinsically interleaved high-/low-side transistor layout shows low area-specific on-resistance. 3µm spacing between high-/low-side transistor channels causes lateral thermal coupling. Compared to discrete transistors, the simulated channel temperature ripple at the kHz-range (switching) and Hz-range (phase-shifted currents) is reduced. Capacitive substrate coupling effects are investigated for SVPWM. A substrate biasing network is proposed to minimize negative back-gating. “A High Precision Dynamic Characterization Bench with a Current Collapse Measurement Circuit for GaN HEMT Operating at 175°C” by Van Sang Nguyen, Engineer, CEA Tech/France shows the dynamic behavior of a GaN HEMT in a dedicated double pluse test (DPT) bench focusing on the switching losses, the conduction losses and the current collapse characterization at high temperatures of operation. In the same time, an additional inverter leg is used to control the soaking time of the device under test (DUT); and locally heat up the DUT thanks to a focused infrared beam. Finally, a circuit with operational amplifiers is designed to measure precisely the voltage drop across the GaN HEMT several ns after the end of the turn- ON. The design of the DPT, the high temperature test-bench and experimental results are presented. SiC / GaN Devices The first session on this subject (Wednesday May 5, 1:55 – 2:55 pm) features four streams. “Experimental Characterization of Different GaN HEMTs used in a Full-Bridge Totem-Pole Power Factor Correction Topology for Electric Vehicles Charging Circuits” by Marco Chiadò Caponet, Professor, Beuth University of Applied Sciences Berlin/Germany experimentally investigates in relation to their application a full-bridge totem-pole power factor correction circuit for Electric Vehicles charging stage. The resulting switching trajectories and the switching losses are investigated and discussed. A 2500 W full-bridge totem-pole power factor correction circuit using GaN HEMTs was tested. The full-bridge totem- pole power factor correction circuit using GaN HEMTs can be used in the area of level one (power of 2500 W) charging options. “Switching Loss Estimation of GaN-HEMTs by Thermal Measurement Procedure” is described by Benedikt Kohlhepp, Research associate, Friedrich- Alexander-University Erlangen-Nuremberg/Germany. Modern wide bandgap semiconductors enable high efficient power conversion and provide superior switching behavior. For achieving high efficient converter designs, reliable data concerning losses is vital. Due to the high voltage and current slew rates during switching, the conventional double pulse test cannot be beneficially applied to gain results concerning switching losses. Thus, this digest proposes a novel procedure to estimate switching losses by means of thermal measurements. The stream “GaN based Integrated Power Stages (IPS) for Low Power Adapter/Charger Applications” by Robert Vartanian, Principal Engineer, Infineon Technologies/USA delineates the pros and cons of Active Clamp Flyback (ACF) and Hybrid Flyback (HFB) topologies from system perspective. The operating principle with design details using CoolGaN IPS will be demonstrated in a 65 W charger/adapter. It will also be shown that the choice of GaN devices can improve HFB efficiency at low line, the most critical condition of this