April/May 2021

PCIM 2021 17 www.power-mag.com Issue 2 2021 Power Electronics Europe current sharing and provide best design practices. “SiC Power Device Evolution: Characteristics Analysis and Performance Comparison of Gen2 and Gen3” is presented by Anselmo Gianluca Liberti, Senior Application Development Engineer, STMicroelectronics, Italy. Wide Band Gap devices are considered as the main candidates for replacing conventional Si devices. Several optimization methods have led to the emergence of different technologies such as the Gen3 which is the 3rd and latest generation of SiC Power MOSFETs belonging to the STPOWER family. This stream highlights the main characteristics that differentiate the two SiC technologies, the well-known Gen2 vs the newcomer Gen3, allowing to choose the one that best fits for application needs. “A Novel Trench SiC-MOSFETs Fabricated by Multiple-Ion-Implantation into Tilted Trench Side Walls (MIT2-MOS)” will be introduced by Katsutoshi Sugawara, Researcher, Mitsubishi Electric/Japan. A new trench gate SiC MOSFET (MIT2-MOS) is applying bottom p-well region (BPW), sidewall connection region (SC) between p-well (PW) and BPW, and JFET doping region (JD). The structure has been fabricated by utilizing multiple ion implantations with tilted beam angle after trench etching. The session SiC Devices IV on the Tuesday (May 4, 2:15 – 3:15 pm) covers four streams. “Investigation of 1200 V SiC MOSFETs Switching Performance in 4-pin Package” by Luigi Abbatelli, Application Development Manager, STMicroelectronics/Italy investigates the dynamic behavior of the 1200 V SiC MOSFETs featuring a sensing pin versus the standard ones without sensing pin. In detail, thanks to a specific flexible test vehicle (6 kW DC/DC synchronous buck converter), a single power board has been used to investigate the dynamic performance of both solutions. The purpose of the present analysis consists in exploring the eventual advantages offered in case of pin-to-pin replacement. “Impact of Self-Heating Effect on Plateau Voltage and Gate Charge Measurement for SiC MOSFETs Characterization” by Mario Pulvirenti, Appl. Engineer, also from STMicroelectronics, analyzes the gate charge measurements of SiC MOSFETs and their correlation with junction temperature. The definition of gate-drain charge is related to the Miller region of gate-source voltage, which is very sensitive to junction temperature. According to the working point, self-heating can affect the test since junction temperature can change quickly assuming a very different value compared to the device case temperature. “Hybrid Switch with SiC-MOSFET and Fast IGBT for High Power Applications” by Felix Kayser, Research associate, University of Rostock/Germany describes a new Si-SiC-Hybrid approach, where the IGBT is used for fast switching and the MOSFET for low on-state voltage. Experimental results with scaled 1.2 kV chips and calculations of efficiency and output power are shown. “High Power Density SiC Power Module for Formula E: Requirement, Design Considerations and Test Results” are presented by Milad Maleki, Senior R&D Project Manager, Hitachi ABB Power Grids, Switzerland. The Formula E, due to its competitive nature, requires fully optimized power modules including the latest technologies. Herein, firstly, the key requirements of Formula E are compared with the EV applications. Then, the design considerations such as semiconductor device selection, EM design, switching condition, cooling schemes and effect of component selection on the thermal resistance and power density are discussed. Finally, the characteristics of RoadPak module optimized for Formula E converter and results are demonstrated. High Power SiC Devices This session starts on the Wednesday (May 5, 10:20 – 11:05 am) with three streams. An “All SiC Module with 1700V Rated 2nd Generation Trench Gate SiC- MOSFETs” is introduced by Aiko Takasaki, Engineer, Fuji Electric/Japan. In this stream, electrical characteristics for a newly developed 1700V/300A All-SiC module with 2nd generation trench gate SiC-MOSFETs is described. Moreover, it has been demonstrated that a significant increase of output power of power conversion could be achieved by using the All-SiC module compared with conventional Si-IGBT modules. With “Enhancement of Switching Performance and Output Power Density in 3.3 kV Full SiC Power Module” Hitachi’s latest full SiC power module is reported by Takahiro Morikawa, Senior Engineer, Hitachi Power Semiconductor Device, Japan. The original SBD-less module switching characteristics were improved further adopting a new internal design and component devices. Total switching losses were decreased by approximately 30 % compared to the conventional version. This improvement will contribute to an increase in output power and carrier frequency, enabling exceptional system design with low harmonic losses and compact passive components. The stream “3.3kV All SiC MOSFET Module with Schottky Barrier Diode Embedded SiC MOSFET” by Hiroshi Kono, Expert, Toshiba Electronic Devices & Storage, Japan, is nominated for the Best Paper Award (supported by PEE). A 3.3 kV class SiC MOSFET chip was fabricated by optimizing the cell structure of a Schottky Barrier Diode (SBD) embedded SiC MOSFET. The developed SiC MOSFET not only suppresses the bipolar operation but also achieve a lower on resistance compared to conventional SiC MOSFETs. We have also developed a low inductance module. The switching losses of the 3.3 kV/800 A module were investigated. A significant loss reduction was achieved compared to conventional Silicon (Si) IGBT module. SiC in Transportation Application This session on the Wednesday (May 5, 1:55 – 2:55 pm) covers four streams dedicated on drives and traction. “A SiC Based High Efficiency 22 kW Bi-Directional EV On-Board Charger” by Chen Wei, Sr. Manager, SiC Application Engineering, Wolfspeed/China, nominated for the Best Paper Award, presents a SiC MOSFET-based 22 kW bi- directional on-board charger (OBC) for Electric Vehicle (EV), with high efficiency, high power density and wide output voltage range. To achieve high efficiency in both charging and discharging mode, a novel flexible control scheme is studied in the paper. A digital controlled prototype with a switching frequency of 140 -250 kHz for CLLC converter and 45 kHz for the Active Front End (AFE) is demonstrated with exceeding 97 % in peak efficiency in both charging and discharging mode. A “Bearing Shield Integrated SiC-Based Traction Inverter for a Dual Three- Phase PMSM Drive System” is introduced by Christian Mertens, Volkswagen AG/Germany. With respect to increased efficiency and reduced installation space a new design approach of a highly integrated traction inverter for automotive application using silicon carbide transistors is presented. A novel mechatronic concept for the integration of the power electronic inverter to the bearing shield has been invented. Appropriate components for modular building blocks are developed and tested. In addition a PM synchronous machine with an innovative dual three-phase hairpin winding is adapted to the needs of the integration concept. “Measures to Improve Efficiency, Peak Power Density and Current Density in an Automotive SiC Drive Train Inverter – Sensitivity Analysis of Design Parameters” by Teresa Bertelshofer, ZF Friedrichshafen/Germany presents how the different design paramters like Rdson, Rth, Uds,... of an automotive SiC inverter affects the three KPIs: efficiency, peak power density and current density. “Tailoring the Chip Area of SiC MOSFET Power Modules for Traction Applications” is given by Stefan Schönewolf, Entwicklungsingenieur Traction Drives, Siemens Mobility/Gerrmany. As a first approximation, the performance of SiC MOSFET modules varies linearly with the number of chips inside the module. This paper shows that several nonlinear dependencies are complicating benchmarks and designs. To cover these nonlinearities, an iterative workflow to adjust the chip area inside a power module to meet the application requirements of railway traction converters is presented. This approach makes it possible to compare different chip and package technologies on a fair basis. Power Modules “Consideration of Oscillation Dilemma from Dual 3.3 kV and 6.5 kV High Voltage Common Package” will be introduced by Taiga Arai, Senior Engineer, Hitachi Power Semiconductor Device, Japan on the Monday (May 3, 1:20 pm). Self Excited Oscillation (SE-Osc) and Plasma Extraction Transit Time Oscillation (PETT-Osc) and influences between the upper and lower arms of an industrial standard 100x140mm dual package are presented. Although the resonant loop inductance ranges to suppress PETT-Osc conflict between 3.3