Power Electronics Europe Issue 4 - November 2022

www.wolfspeed.com WBG DATACENTER 27 www.power-mag.com Issue 4 2022 Power Electronics Europe enterprise datacenter power sector is therefore adopting a 48 V architecture. Generation 2 rack systems, built out as discrete 2-4 kW power blocks, replace the massive high-voltage Uninterruptible Power Supply (UPS) and Power Distribution Units (PDUs) from Generation 1 with smaller UPSs per rack that are charged using a 48 V DC supply. The AC/DC and DC/DC supplies not only operate each server board but charge the UPS battery. The removal of load sharing and redundancy from Generation 1 leads to the requirement for each power supply to operate at close to full (100 %) load. Challenges to server PSUs Apart from the challenges due to the changes discussed above, it is worth noting that the OCP 3.0, Open Rack V.2 (ORV) and Bitcoin/mining power supply units (PSUs) require a move beyond 2 kW to the 3-4 kW range. Rack manufacturers continue to call for small form factors and low profiles of 40 mm (height), high power density, effective and low-cost thermal management, and EMI design to manage the high-speed switching that reduces size of the magnetics. In addition, there is requirement for full digital control and design flexibility from using power MOSFETs mounted on a daughter card. In considering semiconductor device technologies to solve these challenges, differences must be noted in terms of bandgap, critical electrical breakdown, electron mobility, and thermal conductivity, all of which affect the peak operating temperature, voltage, efficiency, and thermal management requirements of the system. The semiconductor solution Although Silicon is the most familiar technology, its smaller bandgap limits operating temperature, its low breakdown electric field restricts its use to lower voltages, and its low thermal conductivity limits power density compared to wide bandgap materials, like gallium nitride (GaN) and Silicon Carbide (SiC). For the efficiencies needed in datacenter power supplies, it is important to compare switching and onduction losses. Conduction loss, which is the device’s I2R loss, is lower when the ON drain-to-source resistance (R DS(ON) ) is low and changes less with temperature. Figure 2 shows normalized R DS(ON) plotted against temperature for the technologies that many designers consider using to meet Gen2 datacenter PSU requirements — SiC, GaN, and Si Super Junction (SJ). It is interesting to note that both GaN and SJ devices boast a lower R DS(ON) below 25°C, which are temperatures not quite practical for datacenter power supplies. As datasheets for GaN and SJ devices often specify R DS(ON) at 25°C, it can mislead engineers into assuming that specification at the much higher operating temperatures for which systems are normally designed. Another interesting characteristic to note in Figure 2 is the change in R DS(ON) over temperature. SiC’s curve remains nearly flat, and although the other technologies both show a significant increase in R DS(ON) , this change is particularly dramatic for GaN. Since designers have to use R DS(ON) at real- world junction temperatures of 120°C to 140°C, a 60-m Ω SiC device would be 80- m Ω “hot,” while a 40-m Ω Si SJ or GaN device would really be significantly >80- m Ω hot. GaN’s low switching loss vs low total loss GaN’s high electron mobility is the property that enables its well-known and unmatched efficiency at very high switching frequencies. Among the technologies discussed here, GaN offers the lowest switching loss (Figure 3). Wolfspeed compared their 60-m Ω SiC device with a 50-m Ω GaN device in a totem pole PFC simulation to find that although GaN had slightly lower switching losses over the entire power range, any gains were offset by the increased Figure 2: Generic chart showing typical MOSFET R DS(ON) (normalized) change over temperature Figure 3: A study comparing a Wolfspeed 60-m Ω Silicon Carbide with a 50-m Ω GaN device in a totempole PFC simulation (power loss vs output power left, circuit right)