Power Electronics Europe Issue 4 - November 2022

16 POWER MODULES www.vicorpower.com Issue 4 2022 Power Electronics Europe www.power-mag.com NewSpace demands low voltage, high current power for performance and longevity Matt Renola, Senior Director, Global Business Development – Aerospace & Defense Satellite operators are offering increasingly sophisticated on-board processing capabilities necessitating the use of the latest ultradeepsubmicron FPGAs and ASICs. These have demanding, low-voltage, high-current, power requirements and OEMs are being challenged to offer more functionality from smaller payloads and platforms. Cost and time-to-market are also key drivers! Relatively, smaller satellites harvest less energy and with operators increasingly using faster and more on-board processing, there is a requirement that as much of the possible power budget is available for the payload. Traditional power- distribution architectures comprising an isolated DC-DC to step-down the external bus input, followed by localized POLs to produce the required load voltages, are becoming too inefficient because of large I2R drops. To deliver the next generation of New Space missions, improvements are needed in conversion loss, power density, physical size and a transient response compatible with the switching speeds of the latest ultradeepsubmicron devices. Instead of the conventional, intermediate power-distribution comprising an isolated DCDC followed by buck bricks, Vicor Corporation’s patented Factorized Power Architecture (FPA™) uses a modular approach to minimize I 2 R distribution losses, maximize efficiency and improve transient response. The FPA comprises two stages: voltage regulation followed by transformation. First, a buck-boost topology is used to generate a 48V intermediate rail from an external source, which is significantly higher than the lower legacy buses typically input to POLs. For example, a 48V output bus requires four times less current than a 12V intermediate bus for the same power ( P = VI ) and PDN losses are the square of the current ( P = I 2 R ), which reduces by sixteen. Placing a regulator first to produce 48V achieves the highest efficiency, allowing smaller satellites to avail of more of the harvested energy. The second stage of the FPA uses a transformer to convert the 48V intermediate rail to the desired load voltage, e.g. 1V. The output is a fixed fraction of the input (K-factor) defined by the turns ratio. Stepping down the voltage increases the current by the same amount, e.g. a 1A input current would be multiplied to an output of 48A: A Pre-Regulation Module (PRM™) and a Voltage-Transformation Module (VTM™) current multiplier combine to realize the FPA, with each device fulfilling its specialized role to enable complete DC-DC conversion. The PRM generates a regulated ‘factorized bus’ from an unregulated input followed by the VTM, which transforms (steps down) the 48V to the desired load voltage. The VTM’s high bandwidth avoids the need for large point-of-load capacitance. Even without any external output capacitors, the output of a VTM exhibits a limited voltage perturbation in response to a sudden power surge. A minimal amount of external bypass capacitance (in the form of low ESR/ESL ceramic capacitors) is sufficient to eliminate any transient voltage overshoot. Without imposing the bandwidth limitations of an internal control loop struggling to maintain regulation, the VTM offers a unique capacitance- multiplication feature. For example, the effective, shunt output capacitance is 2304 times the input capacitance when a K factor of 1/48 is used, i.e. C SEC = C PRI * K 2 . This means that significantly less decoupling is needed downstream of the VTM and only a small amount of capacitance at its input offers the same energy storage as the bulky tantalums typically added to the 1V output of a traditional buck brick as illustrated in Figure 1. Low impedance is a key requirement for powering low-voltage, high current loads efficiently and the use of a VTM also reduces the effective resistance seen from the secondary side by K 2 . This allows the VTM to be placed at the load, either laterally or vertically, resulting in a lower- loss PDN. The FPA’s lower-current, higher- voltage intermediate bus means that the PRM can be located physically away from the VTM without impacting efficiency. This Figure 1: These diagrams show how the FPA compares to a traditional, intermediate architecture.