Power Electronics Europe February/March 2022

28 INDUSTRY NEWS Issue 1 2022 Power Electronics Europe www.power-mag.com on the transformer. The output of this is configured as a flyback winding which is rectified and filtered using diode D2 and capacitor C3, fed in the BPP pin via a current limiting resistor R5. In this design the input primary under and overvoltage features were disabled by connecting the V pin to source. The secondary-side of the INN3947CQ IC provides output voltage, output current sensing and drive to a MOSFET providing synchronous rectification. The 24 V output rectification is provided by SR FETs Q1 and Q2. Low ESR capacitors, C9, C10, C11, C13, C14 and output inductor L1 provide filtering. RC snubber network comprising D4, R7, R8, and C5 for Q1 and Q2 damps high frequency ringing across SR FETs, which results from leakage inductance of the transformer windings and the secondary trace inductances. The gates of Q1 and Q2 are turned on based on the winding voltage sensed via R6 and the FWD pin of the IC. Capacitor C16 is used to suppress high frequency spikes on the FWD pin. In continuous conduction mode operation, the SiC MOSFET is turned off just prior to the secondary-side controller commanding a new switching cycle from the primary. In discontinuous mode the SiC MOSFET is turned off when the voltage drop across the MOSFET falls below ground. Secondary-side control of the primary-side SiC MOSFET ensures that it is never on simultaneously with the synchronous rectification MOSFET. The MOSFET drive signal is output on the SR pin. A gate enhancement circuit comprising D3, R13 and Q3 prevents V gs to turn-on during primary turn-ons. The secondary- side of the IC is self- powered from either the secondary winding forward voltage or the output voltage. The output voltage powers the device, fed into Zener diode VR1 which is connected to the VO pin. Zener VR1 is used to reduce the voltage stress on the VO pin. It will charge the BPS pin capacitor C6 via an internal regulator. The OVP sensing circuit, R14, VR2 and D5, connected to BPS pin provides secondary-side protection. Resistors R9 and R10 form a voltage divider network that senses the output voltage. INN3947CQ IC has an internal reference of 1.265 V. Capacitor C7 provides decoupling from high frequency noise affecting power supply operation, and C8 and R11 is the feedforward network to speed up the response time to lower the output ripple. The output current is sensed by R12 and filtered by C17 with a threshold of approximately 35 mV to reduce losses. Once the current sense threshold across these resistors is exceeded, the device will go into auto-restart. Available output power at elevated ambient (Figure 3) can be increased by providing a thermal path from the PCB area connected to the SOURCE pin of the InnoSwitch3-AQ to a surface that is lower in temperature. This is typically the outer wall of the inverter or internally above the water channel cooling the power modules. A very simple approach is a compliant thermal pad (e.g. TGP 1500 from Berquist) placed between the PCB and bottom or top surface of the enclosure. In the design of the cast enclosure features may be added at no cost to provide a location to place the pad for manufacturing simplicity and reduce the thickness of pad needed to reduce cost of pad needed. Figure 4 shows the populated top side circuit board. https://www.power.com/products/innoswitch/innoswitch3-aq Figure 3: Maximum output power vs. ambient temperature (based on 125°C junction temperature of INN3947CQ) Figure 2: Flyback switcher 35 W power supply 40 VDC to 1000 VDC input featuring 1700 V SiC MOSFET Figure 4: Populated top side DER-913Q circuit board