June/July 2021

www.apec-conf.org APEC 2021 33 www.power-mag.com Issue 3 2021 Power Electronics Europe 32-phase 1200 A DC/DC Converter for Data Centers Both high-frequency half-bridges are realized using e-mode GaN HEMTs, specifically 600 V CoolGaN IGO60R070D1. Converter operation During the positive half-cycle of the AC voltage, S6 is turned on and S5 is turned off. At this time, the half-bridge of phase 1 switches as a boost active switch and S2 is the synchronous-rectifier switch. The operation of phase 2 is the exact same as that of phase 1, except that the PWM is shifted 180 degrees with respect to the at of phase 1. This has the effect of reducing the ripple current in both in input and output circuits. Higher efficiency is realized since the output current is split across two paths and can substantially lower I 2 R losses. GaN devices are certainly capable of high switching frequencies. However, switching losses in hard-switched continuous conduction mode (CCM) applications such as PFC cannot be neglected. As a compromise between inductor sizing and target efficiency, a switching frequency of 65 kHz is chosen. Almost half the losses of the converter occur in GaN half-bridges (Figure 2). An efficient thermal design is proposed wherein the top-cooled GaN devices are soldered on PCB cards as half-bridge modules and flank the heatsink on two sides. A third side of the heatsink (the bottom) is used to evacuate heat from Si MOSFETs. Two low power 12V fans are used to remove this heat from the heatsink and provide cooling to the power stage inductors. The complete assembled prototype is shown in Figure 3. A steady-state thermal model is utilized to predict GaN device junction temperature and provide high overcurrent capability. Experimental results verified a peak efficiency of 99.2 % during DC/DC operation at 2.5 kW and a full-load efficiency of 99.1 % at 5.4 kW. Literature Design and Implementation of A 5kW 99.2% Efficient High-Density GaN- based Totem Pole Interleaved Bridgeless Bidirectional PFC, APEC 2021 Procedings, pages 1843-1847 Figure 1: Totem-pole PFC circuit with two high-frequency half-bridges (S1/S2 is the first half-bridge, and S3/S4 is the second) converter with S2 as the active switch and S1 as the synchronous-rectifier switch. This operation is exactly flipped during the negative half-cycle where S6 is turned on and S5 is turned on. During the negative half-cycle, S1 is the Figure 2: Loss breakdown at rated power Figure 3: Assembled 5kW prototype The paper from presents a multiphase converter solution that provides 1200 A to server and artificial intelligence systems. Computing power in these systems keeps increasing, since CPUs, GPUs, FPGAs and ASICs demand higher and higher current from multiphase interleaved synchronous converters. More than twenty phases of power stage are required, but it is extremely difficult to design a digital PWM controller with more than twenty phases due to limitations in package size and control complexity. Phase paralleling is proposed in this paper to double phase number of a 16-phase digital controller to 32 phases. Wenkang Huang, Infineon Technologies/USA (wenkang.huang@infineon.com ) Computing power of CPUs and GPUs have been increasing steadily to meet demands of data centers, cloud computing, and artificial intelligence systems. Most recently, FPGAs and ASICs have joined forces in artificial intelligence applications and have dramatically boosted computing power. Although output voltage of multiphase synchronous buck converters that power these CPUs, GPUs, FPGAs, and ASICs keeps coming down to as low as 0.6 V to reduce power consumption, the ºrequired converter current has exceeded 1200 A. Since average current of each phase is usually limited at 40 to 60 A due to restrictions in MOSFET technology and package size, power dissipation, cooling method, and inductor size, more than twenty phases of power stages with current sharing are required to meet this higher current requirement. Experimental results A 32-phase synchronous buck converter board (Figure 1) was built to demonstrate the 1200 A power solution and accurate current balance during steady-state and dynamic load transient conditions that emulate load current in real data center and artificial intelligence systems. The board consists of a 16-phase digital controller, 32-phase power stages including inductors, input connectors for input voltage, and on-board electronic loads and output connectors for the 1200 A output current . The board is used to verify the design and evaluate load transient response and current sharing among all the phases. Current sharing between the sixteen combined phases is realized by the 16- phase PWM controller through average current sharing and dynamic cycle-by-