June/July 2021

28 APEC 2021 www.apec-conf.org Issue 3 2021 Power Electronics Europe www.power-mag.com control of the saturation current while maintaining a competitively low on- resistance. Experimental results To demonstrate the benefits of the SCCL, a standard GaN device with a GaN device with SCCL has been compared. Both devices have the same chip-area, have the same 650-V rating, and have been packaged in 8x8 mm PQFN. Figure 3 shows the room-temperature output characteristics: when the gate is fully on (Vg s = +12 V), the standard device has an average static R on of 53 m Ω and a saturation current (I d,sat ) that exceeds 120 A, whereas the device with the SCCL has an average static R on of 71 m Ω and a significantly lower I d,sat of 42 A. With the SCCL technology, a 3x reduction in I d,sat can be achieved with only a 0.35x increase in static on-resistance. This is possible because the R on is mostly determined by the GaN-HEMT drain-access region (the equivalent of the “drift region” in a conventional power device), which is not affected by the SCCL blocking area. In fact, to control I d,sat , it is sufficient to deploy the current block only in a small length along the entire source-drain spacing. Although the SCCL device has significantly lower I d,sat than the standard device, the SCCL I d,sat is still Short-Circuit Capability for GaN Power Switches Short-circuit capability is essential for the adoption of GaN power devices. An innovative solution for GaN power switches to achieve short-circuit withstanding time (SCWT) equal to or greater than 3 microseconds with limited increase in on-resistance, has been introduced by Transphorm. Thanks to extended SCWT, the Short-Circuit Current Limiter SCCL technology allows the industry to adopt conventional short-circuit protection schemes, with sufficient immunity to noise and switching transients. Davide Bisi, Transphorm Inc. (dbisi@transphormusa.com ) In conventional Silicon-based power-devices, the SCWT can be greater than 10 µs. On the other hand, ensuring a high SCWT in WBG devices is more challenging. Due to their own nature and virtue, WBG devices can deliver much higher power density in smaller areas than Silicon devices. Consequently, when subjected to short-circuit conditions, they may experience a steeper rise in temperature resulting in shorter SCWT than Silicon-based counterparts. Short-circuit current limiter The solution presented is based on the Transphorm normally-off two-chip core technology. A low-voltage normally-off silicon FET is connected in cascode configuration with a high-voltage normally-on GaN HEMT. The Si-FET offers high threshold (+4 V) and highest gate reliability thanks to the robust SiO2/Si MOS technology. The GaN HEMT is fabricated on Silicon substrates for cost- effective manufacturing, and employs a field-plate structure to improve electric-field management and overall reliability. The field-plate is isolated with a dielectric layer to suppress leakage current and off-state losses. SCCL has been patented for GaN devices (Figure 1). In a two-chip normally- off solution, lower short-circuit current and higher SCWT can be achieved by controlling either the saturation-current (I d,sat ) of the Si-FET or the saturation- current of the GaN-HEMT. The SCCL was implemented on Transphorm’s core technology by removing segments of the 2DEG channel along the width of the GaN-HEMT by using a proprietary process. The top-view of a standard GaN-HEMT and a GaN-HEMT with SCCL are shown in Figures 2a and b. Longitudinal cross-sections of the SCCL device are shown in Figures 2c and d. The section AA’ is taken along current aperture path, where the 2DEG is uninterrupted from source to drain and electrons can flow in the on-state. In the aperture, the 2DEG properties (charge density & mobility) and the pinch-off voltage of the field-plate structure are the same as the standard device. The section BB’ is taken along current-blocking path, showing the lack of 2DEG under a limited portion of the field-plate structure. The proper design of the current-blocking segmentation (length, width and periodicity of the current block areas) ensures a good Figure 1: The Short-Circuit Current Limiter (SCCL) acts to reduce the drain-source saturation-current (I d,sat ) to increase the SCWT of the device while preserving low on- state resistance Figure 2: Top-view of two-chip normally-off GaN switch (a) without and (b) with the patented Short-Circuit Current Limiter (SCCL). The SCCL is implemented by removing segments of the 2DEG channel along the width of the GaN HEMT. Longitudinal cross- sections taken along paths featuring (c) the current aperture, and (d) the current block Figure 3: Room-temperature output curves of (a) standard 650-V GaN device and (b) 650-V GaN device with SCCL. When the gate is fully on (V gs = +12 V), the standard device has a saturation current (I d,sat ) that exceeds 120 A, whereas the device with the SCCL has a significantly lower I d,sat of 42 A. A 3x reduction in I d,sat is achieved. with only a 0.35x increase in on-resistance