June/July 2021

18 PCIM EUROPE 2021 Issue 3 2021 Power Electronics Europe www.power-mag.com method and two different ways for computing the losses: electrical and calorimetric methods. The efficiency was measured for a switching frequency of 15 kHz and considering three different SiC power modules. Regarding the use of 750 A SiC-MOSFET devices, maximum and nominal efficiency of 98.87 % have been achieved. By replacing them with 375 A SiC-MOSFET devices, the converter reached a maximum efficiency of 99.22 % and a nominal efficiency of 98.87 %. On the one hand, the low voltage switching has been improved, while on the other hand, the conduction losses have increased, thus counteracting the effect of output capacitance reduction. Nevertheless, by using full SiC-Diode modules in the output rectifier, this issue has been diminished, resulting in a maximum efficiency of 99.33 % and a nominal efficiency of 99.02%. Overall, these results show that an experimental test bench, rated for full power, is essential, mainly, considering the power, voltage and switching frequency levels required by this project. Finally, the proper understanding of switching waveforms and choice of semiconductors devices regarding the output capacitance are inevitably necessary to achieve such outstanding converter efficiency. Literature Characterization of a 300 kW Isolated DC-DC Converter using 3.3 kV SiC- MOSFETs, Proceedings PCIM Europe digital days 2021, pages 745-750 Adaptive Current Source Gate Driver for SiC MOSFETs This awarded paper (Young Engineer Award) presents the design and operating principles of a novel current-source gate driver for SiC MOSFETs with adaptive functionalities that aims to improve controllability of di/dt and dv/dt compared to conventional totem-pole voltage source gate drivers. The proposed gate driver is capable of providing a double injection of the gate current. Gard Lyng Rødal, Norwegian University of Science and Technology (NTNU), Norway (gard.l.rodal@ntnu.no ) The manufacturers of SiC MOSFETs usually recommend a negative drive voltage for turn-off (e.g., -5 to -8 V), and hence a larger voltage difference must be overcome to reach the threshold voltage of the switch, which increases turn-on delay times. However, the existing CSGD (current-source gate drivers) designs lacks the ability of providing further current pulses to further adjust the switching waveforms. For instance, when the MOSFETs reach the Miller plateau, the gate current is generally clamped at some value, with little ability to further alter the switching behavior of the device. A current source driver that aims to increase the switching speed and enhance dv/dt and di/dt controllability of SiC MOSFET by injecting two pulses of gate current at specified time intervals during turn-on and turn- off switching transients has been designed. The first current injection aims at reducing the turn-on delay time and provide current until the gate-source voltage reaches a specific value (e.g. the Miller plateau voltage). The second current injection aims to adjust the time the gate- source voltage is clamped at the Miller plateau, by either sourcing or sinking additional gate current at this stage. Thus, the proposed driver takes advantage of the voltage dependent capacitances governing the switching transients of SiC MOSFETS, to adjust and shape the turn-on/off delay times, di/dt and dv/dt of the switched device. Driver concept The schematic (Figure 1) of the proposed adaptive CSGD comprises a full- bridge circuit ( T 1 T 4) with three charging inductors L M , L H and L L . One additional auxiliary switch ( Taux ) is connected in parallel to the driving voltage source. The driving voltage sources are V H for the on-state gate voltage and V L for off-state voltage. Two bias capacitors C bH and C bL are paralleled to the voltage sources to provide gate charge at the switching transients. The turn-on process is initiated by pre-charging the inductor L M to the defined current value. This is done by keeping the switches T 1 and T 4 in the on-state, which cause the charging of the inductor. After pre-charging L M , the MOSFET is turned on by injecting i m into the gate. By turning T 4 off while keeping T 1 on, i m is commutated into the gate path. After turn-on, the second Figure 1: Schematic diagram of the proposed adaptive CSGD (ACSGD) and the SiC MOSFET under test (DUT)