April/May 2021

24 POWER MODULES www.vicorpower.com Issue 2 2021 Power Electronics Europe www.power-mag.com size panel and make full use of both sides of the modules’ internal PCB for active and passive components (Figure 4). Making and cutting ChiPs from panels is very similar the way Silicon chips are made and cut from wafers, enabling a manufacturing operation that is streamlined, high-volume and very scalable. Three-dimensional ChiPs enable AI and high-performance computing More recent innovations in ChiP packaging are enabling several new high-growth applications. One of the most demanding is advanced artificial intelligence, where processor current levels have risen above 1000 amps. In these applications, power distribution loss in PCB copper power planes has become a dominant loss term and constrains performance. To meet the requirements of these demanding applications, the best location for the power module to minimize impedances is directly under the processor and exactly matching the power modules’ output power pins with the power pin array of the processor above. Unfortunately, this is also the optimal location for the large number of bypass capacitors required for energy storage to meet instantaneous processor power demands, creating a board layout conflict. ChiP stacking for vertical power delivery The challenge of vertical power delivery (VPD) has been met with a multilayer stacking technology (Figure 5). The new VPD power module consists of a current multiplier layer and a “gearbox” layer, which holds the bypass capacitors and changes the pitch of the current multiplier to match the pitch and layout of the AI processor power pin map above. This new multilayer packaging technology enables AI processor power system designers to deliver power in the most optimal way and to get the maximum performance out of their processor for high-performance computing (HPC) applications. Conclusion The ChiP packaging approach focuses on the miniaturization of every single component and element that makes up the module. As Vicor makes further improvements in performance, ChiP packaging will exhibit new levels of innovation. For 40 years Vicor has pushed the limits of magnetics and power engineering routinely delivering the next generation of power-dense products for customer’s world-changing innovations. With this momentum and using the five pillars as a compass, the journey is nowhere near over. Figure 4: The new panel manufacturing process was another innovation for the power industry. ChiPs are all cut from the same size panel, enabling an automated high-volume manufacturing process Figure 5: Vertical power delivery to advanced AI processors with stacked ChiPs reduces board and substrate power losses to improve processor performance To receive your own copy of Power Electronics Europe subscribe today at: www.power-mag.com